Asynchronous Pipeline Design using GaAs PDLL Logic and new CMOS dynamic techniques
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چکیده
dynamic techniques Sam S. Appleton, Shannon V. Morton, & Michael J. Liebelt Internal Report : HPCA-ECS-96/04 version I, June 17, 1997 Abstract|We explore the potential for extremely high asynchronous logic performance in CMOS and GaAs dynamic logic structures. By using a new class of GaAs dynamic logic, Pseudo-Dynamic Latched Logic, we develop asynchronous control structures capable of high-speed operation. We show how these techniques can be used for CMOS design, and give performance estimates.
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تاریخ انتشار 1997